The present inventive concepts relate to semiconductor circuits, and more particularly, to low power toggle latch-based flip-flop circuits including integrated clock gating logic.
Master-slave flip-flops are the most used standard cell in central processing unit (CPU)-based semiconductor circuits. As CPU core counts continue to increase along with the evolution of CPU technology, the number of flip-flops instantiated within a particular CPU design also continues to increase. During normal CPU operations, the data input to flip-flops often have extremely low change activity. But the internal clock activity continues to toggle and burn power. The flip-flops consume the most power in comparison to all other standard cells used in CPU-based semiconductor circuits. The internal clock power consumption continues to burn power at every clock cycle even when the input data to the flip-flop has low change activity. The high consumption of power impacts the longevity of battery life in mobile devices, adds to heat build-up within devices themselves leading to other performance-related issues, and for stationary devices such as computer servers or desktop systems, increases the overall cost of maintaining and powering the equipment.